sifilter(1)                       SDK R4.11                      sifilter(1)


NAME
       sifilter - preprocess MC88100 assembly language (88k only)

SYNOPSIS
       sifilter [options] [input] [output]

DESCRIPTION
       Sifilter manipulates MC88100 assembly language source code from input
       to work around known problems in the MC88100 silicon.  Sifilter is
       normally invoked transparently by the assembler /bin/as but can be
       used directly for testing purposes. The program can be expected to
       disappear when silicon is sufficiently mature.

       Input and output are normally omitted, defaulting to standard input
       and output paths.  Filenames may be specified for either path, and a
       dash (-), denoting standard input, may be used as a place holder for
       input.

       The translations performed by sifilter are controlled by the switches
       listed below.  The assembler /bin/as sets the "standard" option, -r.
       Since each revision of the silicon requires a different set of
       workarounds, the actual behavior of the "standard" option may vary.

   Switches
       a         Insert a trap-not-taken (tb1 0,r0,511) after each ld or
                 ld.d.

       b         Split each st.d into an equivalent sequence of two st
                 instructions.

       c         Do not pass comment lines through to the output.

       d         Issue each st or st.d twice.

       D         Synthesize immediate operands of div instructions.

       e         Enable literal synthesis. See Literal Synthesis below.

       F         Warn about use of double precision source operands in
                 floating point instructions.

       h         Produce code that converts double-precision floating-point
                 operands to single-precision operands before performing
                 floating-point operations.  The conversion checks for
                 values outside the range representable in single precision
                 and simulates an illegal instruction trap when conversion
                 is not possible.

       l         Split each ld.d into an equivalent sequence of two ld
                 instructions.

       l         Split each ld.d into an equivalent sequence of two ld
                 instructions.

       p         Insert a trap-not-taken before each st or st.d.

       q         Insert a dummy ld before each ld.  A dummy load is a load
                 in which the destination register is r0.  The source
                 operands in a dummy load are the same as those in the
                 actual load which follows.

       r         Perform a "standard" set of fixes for current silicon.
                 Check the DG/UX release notice to determine the behavior of
                 the current sifilter on the system.

       s         Produce a statistics dump on the standard error path on
                 termination.

       t         Synthesize immediate operands of div and mul instructions
                 which have any of the high 5 bits set.

       V         Displays a version identification message and exits
                 immediately.

       v         A single v enables "verbose" mode, in which various
                 messages detailing actions taken by sifilter are output as
                 comment lines. Two or more instances of v in the option
                 string generates a comment line containing the current
                 location counter value before each source line.

       y         Insert a no-op after each trap-not-taken generated by the z
                 option. If z has not been specified, this option has no
                 effect.

       z         Insert a trap-not-taken after each st or st.d.

   Defaults
       All switches default to "off".  Sifilter performs the following
       transformations regardless of the option switches specified.


       -    addu and subu instructions with operands r31,r31,lit32 where
            "lit32" is a constant whose value is greater than 64K are
            replaced with an equivalent sequence.

       -    Floating point instructions involving double operands may be
            moved if they would otherwise fall at the end of a cache line.

   Literal Synthesis
       Since sifilter must maintain an accurate location counter, it must
       perform the same fixups for "lit16" operands that would normally be
       done by a linker performing literal synthesis.

       Instructions with lit16 operands whose value cannot be determined by
       sifilter (for example, a label), or whose value would require more
       than 16 bits, are replaced with an equivalent sequence. This is
       called "literal synthesis", since a 32-bit value is "synthesized" in
       a register from the literal.

       There are two forms of literal synthesis. The short form:

                or.u   r29,r0,hi16(lit16)
                op     rd,r29,lo16(lit16)

       is used for the add, addu, ld, lda, or, st, xmem, and xor
       instructions (in all their variations) when the source register is
       r0.  When the source register is other than r0, these instructions
       are expanded into the long form:

                or.u   r29,r0,hi16(lit16)
                or     r29,r29,lo16(lit16)
                op     rd,rs,r29

       Instructions which always are expanded with the long form are all the
       variations on and, cmp, div, divu, mask, mul, sub, subu, and tbnd.

       No literal synthesis is done unless the e option has been specified.

   Scratch Registers
       Some of the fixups performed by sifilter require one or two scratch
       registers (split ld.d or st.d, addu, subu, and floats).

       Scratch registers are taken from the set r26-r29.

SEE ALSO
       as(1), cc(1).

NOTE
       Use of sifilter should be coordinated with the revision of silicon on
       the target machine and the revision of the DG/UX kernel.  See the
       DG/UX release notice for details.


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