NAME

serial.diag − Test the serial ports

DESCRIPTION

This test is interactive in that it requires setup by the test technician.  The serial ports may be tested either via an internal loopback, or by external loopback means.  Testing using external loopbacks assures that all pins are appropriately connected and that the I/O driver and receiver circuits in the serial lines are functioning properly. 

DETAILS

None required. 

BOARDS THAT MUST BE INSTALLED

A cpu board, a memory board and the I/O board under test. 

SPECIAL COMMAND LINE PARAMETERS

None

MENU ITEMS SPECIFIC TO THIS TEST

fromBy selecting this item, the user is asked to specify which is the source (sender) port for the test.  The default is port 0. 

toBy selecting this item, the user is asked to specify which is the destination (receiver) port for the test.  The default is port 1. 

bBy selecting this item, the user is asked to specify the baud rate to be used during these tests. The default baud rate is 9600. 

scThis item runs a read/write test, just to verify that the sender and receiver ports are functional. 

atThis item runs an async loop test. 

dmThis item runs an async loop test under DMA in half duplex mode. 

fdThis item runs the async loop test under DMA but in full duplex mode. 

doThis item runs an async DMA out test. 

allThis item runs all loopback tests on the ports the user specified in the from and to parameters. 

all4This test assumes that you have loopback cables attached from ports 0 to 1 and from ports 2 to 3.  This item asks that all tests described above should be run on both sets of input/output ports. 

azAnalyser tests, brings up a separate menu and the message: "Serial Tests that require a protocol analyser". 

SUBMENU For az MENU Item

Connect the protocol analyser to the appropriate port and then select one of the following tests. 

arAsynchronous Receive Test

srSynchronous Receive Test Synchronous Transmit Test

INTERPRETING THE ERROR CODES

The following errors may be generated by this test.  (The actual error wording may differ, however the type of error is as summarized here.) 

101,103
During an async loop test on DMA channels 0, 2, 4 or 5, an unexpected interrupt occured.  This test is run in half duplex mode.

105During an async loop test on DMA channels 0, 2, 4 or 5, the data that was trensmitted did not equal the data that was received. 

107If this error happens, you have selected the wrong port to be the sender.  Ports 0 and 2 can be the "from" ports, and ports 4 and 5 can be the "to" ports for this loopback test. 

109,111
Same as 101.

113An incorrect port pair has been specified for the full duplex testing.  the from port must be specified as port 0 and the to port as port 1. 

115,117
This error occurs during a full-duplex mode test of the serial ports in loopback mode.  The error numbers 115 and 117 have the same meaning as 101.

119An error has occured in the serial data transfer.  The error value is reported and to interpret it you’ll need the data sheet for the serial port chips. 

121Same as 101. 

123A data error has not been signalled by the serial circuitry, however the data that was read did not match the data that was transmitted.  The actual and expected values are reported. 

131A read-write walking one’s test was being conducted, and the data received did not match the data that was transmitted.  The actual and expected values are reported. 

133,135
A read-write addressing test was being conducted, and the data read did not match the data written.  The actual and expected values are reported, along with the failing address.

137Status bits are deliberately reset;  if this error occurs, it reports that a serial port is active when it should have been inactive.  The failing bit(s) and port are reported. 

139Status bits are deliberately set;  if this error occurs, it reports that a serial port is inactive when it should have been active.  The failing bit(s) and port are reported. 

141During a synchronous mode serial receive test, the sender brings the DSR line low.  However the register in the serial receiver still sees DSR as high.  This could be a fault in the sender chip (never actually lowers DSR) or in the receiver chip (never sees DSR move).  Can be checked by an oscilloscope or a logic tester. 

143The receiving port timed out waiting for DSR. 

145This error occurs when DSR fails to reset. 

147Same error as 101. 

149During a synchronous mode serial send test, the sender brings the CTS line low.  However the register in the serial receiver still sees CTS as high.  This could be a fault in the sender chip (never actually lowers DSR) or in the receiver chip (never sees CTS move).  Can be checked by an oscilloscope or a logic tester. 

151A time limit is set during which a character must be output.  This time limit was exceeded. 

153CTS never got reset. 

155During an async receive test, DSR would not reset. 

157,159
Timeout waiting for DSR to be reset.

161During an async receive, the data that was received did not match that which was transmitted. 

201,203
Baud rate mismatch between sender and receiver.  The baud rate of both is reported.

311System error (function inaccessible to user): wrong unit number. 

313Time out, serial chip did not come ready while trying to read a character. 

315Time out, serial chip did not come ready while trying to write a character. 

317Same as 311

319Programmer error: invalid serial port

September 02, 1992