MAKE(1) DOMAIN/IX SYS5 MAKE(1)
NAME
make - maintain, update, and regenerate groups of programs
USAGE
make [ -fmakefile ] [ -piksrnbemtdq ] [ names ]
DESCRIPTION
Make executes commands in makefile to update one or more
target names. Name is typically a program. If no -f option
is present, makefile, Makefile, s.makefile, and s.Makefile
are tried in order. If you use a dash (-) in place of
makefile, the standard input is taken. More than one -
makefile argument pair may appear.
Make updates a target only if its dependents are newer than
the target. All prerequisite files of a target are added
recursively to the list of targets. Missing files are con-
sidered out-of-date.
Makefile contains a sequence of entries that specify depen-
dencies. The first line of an entry is a blank-separated,
non-null list of targets, then a colon (:), then a (possibly
null) list of prerequisite files or dependencies. Text fol-
lowing a semicolon (;) and all following lines that begin
with a tab are Shell commands to be executed to update the
target. The first line that does not begin with a tab or a
pound sign (#) begins a new dependency or macro definition.
Shell commands may be continued across lines with the
<backslash><newline> sequence. Everything printed by make
(except the initial tab) is passed directly to the Shell as
is. Thus,
echo a\
b
produces
ab
like the Shell does.
Sharp (#) and newline surround comments.
The following makefile says that pgm depends on two files,
a.o and b.o, which in turn depend on their corresponding
source files (a.c and b.c) and a common file incl.h:
Printed 12/4/86 MAKE-1
MAKE(1) DOMAIN/IX SYS5 MAKE(1)
pgm: a.o b.o
cc a.o b.o -o pgm
a.o: incl.h a.c
cc -c a.c
b.o: incl.h b.c
cc -c b.c
Command lines are executed one at a time, each by its own
Shell. The first one or two characters in a command can be
the following: -, @, -@, or @-. If @ is present, printing
of the command is suppressed. If - is present, make ignores
an error. A line prints when it is executed unless the -s
option is present, or the entry .SILENT: is in makefile, or
the initial character sequence contains an at sign (@). The
-n option specifies printing without execution; however, if
the command line has the string $(MAKE) in it, the line is
always executed (see the discussion of the MAKEFLAGS macro
under ENVIRONMENT). The -t (touch) option updates the modi-
fied date of a file without executing any commands.
Commands returning non-zero status normally terminate make.
If the -i option is present, or the entry .IGNORE: appears
in makefile, or the initial character sequence of the com-
mand contains a dash (-), the error is ignored. If the -k
option is present, work is abandoned on the current entry,
but continues on other branches that do not depend on that
entry.
The -b option allows old makefiles (those written for the
old version of make) to run without errors. The difference
between the old version of make and this version is that
this version requires all dependency lines to have a (possi-
bly null or implicit) command associated with them. The
previous version of make assumed, if no command was speci-
fied explicitly, that the command was null.
Interrupt and quit cause the target to be deleted unless the
target is a dependent of the special name .PRECIOUS.
OPTIONS
-f makefile Specify makefile as the name of a description
file. A file name of - denotes the standard
input. The contents of makefile override the
built-in rules if they are present.
-p Print out the complete set of macro definitions
and target descriptions.
-i Ignore error codes returned by invoked com-
mands. This mode is entered if the fake target
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name .IGNORE appears in the description file.
-k Abandon work on the current entry, but continue
on other branches that do not depend on that
entry.
-s Silent mode. Do not print command lines before
executing. This mode is also entered if the
fake target name .SILENT appears in the
description file.
-r Do not use the built-in rules.
-n No-execute mode. Print commands but do not
execute them. Even lines beginning with an @
are printed.
-b Compatibility mode for old makefiles.
-e Allow environment variables to override assign-
ments within makefiles.
-m Print a memory map showing text, data, and
stack. This option is a no-operation on sys-
tems without the getu system call.
-t Touch the target files (causing them to be up-
to-date) rather than issue the usual commands.
-d Debug mode. Print out detailed information on
files and times examined.
-q Question. The make command returns a zero or
non-zero status code depending on whether the
target file is or is not up-to-date.
SPECIAL NAMES
.DEFAULT If a file must be made but there are no explicit
commands or relevant built-in rules, use the com-
mands associated with the name .DEFAULT (if it
exists).
.PRECIOUS Dependents of this target are not removed when
quit or interrupt are hit.
.SILENT Same effect as the -s option.
.IGNORE Same effect as the -i option.
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MAKE(1) DOMAIN/IX SYS5 MAKE(1)
ENVIRONMENT
Make reads the environment, assuming all variables to be
macro definitions and processing them as such. The environ-
ment variables are processed before any makefile and after
the internal rules; thus, macro assignments in a makefile
override environment variables. The -e option causes the
environment to override the macro assignments in a makefile.
The MAKEFLAGS environment variable is processed by make as
containing any legal input option (except -f, -p, and -d)
defined for the command line. Invoking make ``invents'' the
variable if it is not in the environment, puts the current
options into it, and passes it on to invocations of com-
mands. Thus, MAKEFLAGS always contains the current input
options. This proves very useful for ``super-makes.'' In
fact, as noted above, when the -n option is used, the com-
mand $(MAKE) is executed anyway; hence, one can perform a
make -n recursively on a whole software system to see what
would have been executed. This is because the -n is put in
MAKEFLAGS and passed to further invocations of $(MAKE) .
This is one way to debug all of the makefiles for a software
project without actually doing anything.
MACROS
Entries of the form string1 = string2 are macro definitions.
String2 is defined as all characters up to a comment charac-
ter or an unescaped newline. Subsequent appearances of
$(string1[:subst1=[subst2]]) are replaced by string2. The
parentheses are optional if a single-character macro name is
used and there is no substitute sequence. The optional
:subst1=subst2 is a substitute sequence. If it is speci-
fied, all non-overlapping occurrences of subst1 in the named
macro are replaced by subst2. Strings (for the purposes of
this type of substitution) are delimited by blanks, tabs,
new-line characters, and beginnings of lines. An example
using the substitute sequence is shown under Libraries.
INTERNAL MACROS
Five internally maintained macros are useful for writing
rules concerning target-building:
$* The macro $* stands for the filename part of the
current dependent with the suffix deleted. It is
evaluated only for inference rules.
$@ The $@ macro stands for the full target name of the
current target. It is evaluated only for explicitly
named dependencies.
$< The $< macro is only evaluated for inference rules or
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the .DEFAULT rule. It is the module that is out-of-
date with respect to the target (i.e., the ``manufac-
tured'' dependent filename). Thus, in the .c.o rule,
the $< macro evaluates to the .c file. Some examples
showing how to make optimized .o files from .c files
are as follows:
.c.o:
cc -c -O $*.c
or:
.c.o:
cc -c -O $<
$? The $? macro is evaluated when explicit rules from the
makefile are evaluated. It is the list of prere-
quisites that are out of date with respect to the tar-
get; essentially, those modules that must be rebuilt.
$% The $% macro is only evaluated when the target is an
archive library member of the form lib(file.o). In this
case, $@ evaluates to lib and $% evaluates to the
library member, file.o.
Four of these five macros can have alternative forms. When
an uppercase D or F is appended to any of the four macros,
the meaning changes to ``directory part'' for D and ``file
part'' for F. Thus, $(@D) refers to the directory part of
the string $@. If there is no directory part, ./ is gen-
erated. The only macro excluded from this alternative form
is $?.
PRESET VARIABLES
The currently defined preset variables are:
GFLAGS =
GET = get
ASFLAGS =
AS = as
RF = rf
FFLAGS = -opt
FTN = ftn
PFLAGS = -opt
PAS = pas
ACFLAGS = -opt
ACC = /com/cc
CFLAGS = -O
CC = /bin/cc
LDFLAGS =
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BINDFLAGS =
BIND = bind
LD = /bin/ld
LFLAGS =
LEX = lex
YFLAGS =
YACC = yacc
MAKE = make
$ = $
MAKEFLAGS = b
SUFFIXES
Certain names (for instance, those ending with .o) have
inferable prerequisites such as .c, .s, etc. If no update
commands for such a file appear in makefile, and if an
inferable prerequisite exists, that prerequisite is compiled
to make the target. In this case, make has inference rules
that allow files to be built from other files by examining
the suffixes and determining an appropriate inference rule
to use. The current default single suffix rules are:
.sh:
cpf $< $@
.rat:
$(RF) $< $(RFLAGS) >$@.ftn
$(FTN) $@ "-i*2" -type $(FFLAGS)
$(BIND) $@.bin -b $@
dlf $@.ftn $@.bin
.ftn:
$(FTN) $@ $(FFLAGS)
$(BIND) $@.bin -b $@
dlf $@.bin
.pas:
$(PAS) $@ $(PFLAGS)
mvf $@.bin $@ -r
.c:
$(ACC) $@ $(ACFLAGS)
mvf $@.bin $@ -r
The current default double suffix rules are:
markfile.o: markfile
A=@;echo "static char _sccsid[] = 42`grep $$A'(#)' markfile` 42;" > markfile.c
$(CC) markfile
rm -f markfile.c
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.c.a:
$(CC) -c $(CFLAGS) $<
ar rv $@ $*.o
rm -f $*.o
.l.c:
$(LEX) $<
mv lex.yy.c $@
.y.c:
$(YACC) $(YFLAGS) $<
mv y.tab.c $@
.l.o:
$(LEX) $(LFLAGS) $<
$(CC) $(CFLAGS) -c lex.yy.c
rm lex.yy.c
mv lex.yy.o $@
.l.bin:
$(LEX) $(LFLAGS) $<
$(ACC) lex.yy $(ACFLAGS)
dlf lex.yy.c
mvf lex.yy.bin $@ -r
.y.o:
$(YACC) $(YFLAGS) $<
$(CC) $(CFLAGS) -c y.tab.c
rm y.tab.c
mv y.tab.o $@
.y.bin:
$(YACC) $(YFLAGS) $<
$(ACC) y.tab $(ACFLAGS)
dlf y.tab.c
mvf y.tab.bin $@ -r
.s.o:
$(AS) $(ASFLAGS) -o $@ $<
.rat.bin:
$(RF) $< $(RFLAGS) >$*.ftn
$(FTN) $* "-i*2" -type $(FFLAGS)
dlf $*.ftn
.rat.ftn:
$(RF) $< $(RFLAGS) >$*.ftn
.ftn.bin:
$(FTN) $* $(FFLAGS)
Printed 12/4/86 MAKE-7
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.pas.bin:
$(PAS) $* $(PFLAGS)
.c.bin:
$(ACC) $* $(ACFLAGS)
.c.o:
$(CC) $(CFLAGS) -c $<
To print these rules on the transcript pad, use the follow-
ing command:
# make -fp - 2>/dev/null </dev/null
The only peculiarity in this output is the (null) string
that printf(3S) prints when handed a null string.
A tilde (~) in the above rules refers to an SCCS file.
Refer to sccsfile(4) for more information about these files.
Thus, the .c~.o rule transforms an SCCS C source file into
an object file (.o). Because the ``s.'' used in SCCS files
is a prefix, it is incompatible with make's suffix point of
view. Hence, the tilde is a way to change any file refer-
ence into an SCCS file reference.
A rule with only one suffix (i.e., .c:) is the definition of
how to build x from x.c. In effect, the other suffix is
null. This is useful for building targets from only one
source file (e.g., Shell procedures, simple C programs).
Additional suffixes are given as the dependency list for
.SUFFIXES. Order is significant; the first possible name
for which both a file and a rule exist is inferred as a
prerequisite. The default list is:
.SUFFIXES: .o .c .y .bin .pas .rat .l .s .
sh .h
Here again, the above command for printing the internal
rules will display the list of suffixes implemented on the
current machine. Multiple suffix lists accumulate; .SUF-
FIXES: with no dependencies clears the list of suffixes.
INFERENCE RULES
The first example can be done more briefly, as shown here:
pgm: a.o b.o
cc a.o b.o -o pgm
a.o b.o: incl.h
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This is because make has a set of internal rules for build-
ing files. You may add rules to this list by simply putting
them in the makefile.
Certain macros are used by the default inference rules to
permit the inclusion of optional matter in any resulting
commands. For example, CFLAGS, LFLAGS, and YFLAGS are used
for compiler options to cc(1), lex(1), and yacc(1), respec-
tively. Again, the previous method for examining the current
rules is recommended.
The inference of prerequisites can be controlled. The rule
to create a file with suffix .o from a file with suffix .c
is specified as an entry with .c.o: as the target and no
dependents. Shell commands associated with the target
define the rule for making a .o file from a .c file. Any
target that has no slashes in it and starts with a period is
identified as a rule and not a true target.
LIBRARIES
If a target or dependency name contains parentheses, it is
assumed to be an archive library, the string within
parentheses referring to a member within the library. Thus
lib(file.o) and $(LIB)(file.o) both refer to an archive
library that contains file.o. (This assumes the LIB macro
has already been defined.) The expression $(LIB)(file1.o
file2.o) is not legal. Rules pertaining to archive
libraries have the form .XX.a, where XX is the suffix from
which the archive member is to be made. An unfortunate
byproduct of the current implementation requires XX to be
different from the suffix of the archive member. Thus, you
cannot have lib(file.o) depend upon file.o explicitly. The
most common use of the archive interface follows. Here, we
assume the source files are all C-type source:
lib: lib(file1.o) lib(file2.o) lib(file3.o)
@echo lib is now up-to-date
.c.a:
$(CC) -c $(CFLAGS) $<
ar rv $@ $*.o
rm -f $*.o
In fact, the c.a rule listed above is built into make and is
unnecessary in this example. A more interesting, but more
limited example of an archive library maintenance construc-
tion follows:
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lib: lib(file1.o) lib(file2.o) lib(file3.o)
$(CC) -c $(CFLAGS) $(?:.o=.c)
ar rv lib $?
rm $? @echo lib is now up-to-date
.c.a:;
Here the substitution mode of the macro expansions is used.
The $? list is defined to be the set of object filenames
(inside lib ) whose C source files are outdated. The sub-
stitution mode translates the .o to .c. Note that the .c.a:
rule, which would have created each object file one by one,
has been disabled. This particular construct speeds up
archive library maintenance considerably. This type of con-
struct becomes very cumbersome if the archive library con-
tains a mix of assembly programs and C programs.
CAUTIONS
Some commands return non-zero status inappropriately; use -i
to overcome this.
Filenames with the equal sign (=), colon (:), or at sign (@)
will not work.
Commands directly executed by the Shell, notably cd(1), are
ineffectual across newlines in make.
The syntax (lib(file1.o file2.o file3.o) is illegal. You
cannot build lib(file.o) from file.o.
The macro $(a:.o=.c~) does not work.
FILES
[Mm]akefile
s.[Mm]akefile
RELATED INFORMATION
cc(1), cd(1), lex(1), sh(1), yacc(1), printf(3S),
sccsfile(4).
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